Hardware inferred from a combinatorial process does not involve any memory elements.
A memory element process is combinatorial when all assigned signals in a process are always explicitly assigned in all possible paths within a process block.
A signal that is not explicitly assigned in all branches of an if or case statement typically leads to a Latch inference.
Important: If Vivado
synthesis infers unexpected Latches, review the HDL source code for a signal that is not
explicitly assigned.