The IBERT core present in the design appears in the Hardware window under the target device. If you do not see the core appear, right-click the device and select the Refresh Hardware command. This re-scans the FPGA and refreshes the Hardware window.
The Vivado serial I/O analyzer feature is built around the concept of links. A link is analogous to a channel on a board, with a transmitter and a receiver. The transmitter and receiver can or cannot be the same GT, on the same device, or be the same architecture. Because a link must be associated with both a transmitter and receiver, connecting an external pattern generator to a single GT receiver is not supported. To create one or more links, go to the Links tab in Vivado, and click either the Create Links button, or right-click and choose Create Links. This causes the Create Links dialog window to appear, as shown in the following figure.
When an IBERT core is detected, the Hardware Manager notes that there are no links present and shows a green banner at the top. Click Create Links to open the dialog box, as shown in the following figure.
Choose a TX and/or an RX from the list available. Or type in a string into the search field to narrow down the list. Then click the Add + button to add the link to the list. Repeat for all links desired.
Links can also be a part of a link group. By default, all new links are grouped together. You can choose not to add the links to a group by deselecting Create link group. The name of the link group is specified in the Link group description field.