Generating and Implementing the IBERT Example Design - 2023.2 English

Vivado Design Suite User Guide: Programming and Debugging (UG908)

Document ID
UG908
Release Date
2023-10-19
Version
2023.2 English
After generating the IBERT IP core, it appears in the Sources window as ibert_7series_gtx or something similar. To generate the example design, right-click the IBERT IP in the Sources window and select Open IP Example Design, specify the desired location of the example design project in the resulting dialog window. This command opens a new Vivado project window for the example design and adds the proper top-level wrapper and constraints file to the project, as shown in the following figure.
Important: Modification of the IBERT IP example design is not recommended and can result in functional issues when interacting with the IBERT IP core in hardware.

Once the example design is generated, you can implement the IBERT example design through bitstream creation core by clicking Generate Bitstream in the Program and Debug section of the Vivado IDE flow navigator or by running the following Tcl commands:

launch_runs impl_1 -to_step write_bitstream
wait_on_run impl_1

Refer to the Vivado Design Suite User Guide: Design Flows Overview (UG892) for more details on the various ways you can implement your design.

Figure 1. IBERT Example Design