Preparing the Design for Implementation - 2023.2 English

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
UG909
Release Date
2023-11-15
Version
2023.2 English

If address offsets or ranges must for a given design source must be modified after they have been associated with a Block Design Container, these edits must be done in the top-level Address Editor.  With the top BD open, the Address Editor (and Address Map) show the details for the active design source.  If the details of another design source must be modified, set that module as Active in the BDC Customization GUI before editing the Address assignments.

Before the design is synthesized and implemented two steps must occur, ensure to execute following steps:
  1. Generate a top-level wrapper for the design
  2. Generate the RTL and IP for synthesis

In the Sources window, right-click on the top level BD and select Create HDL Wrapper. You have the option to create and modify your own top-level RTL code or to let Vivado create and automatically manage this level. Make a selection and click OK.

In the sources, <design>_wrapper.v has been created (if the Vivado manage option is selected) and added to the project. This HDL file instantiates the top-level block diagram.

In the Flow Navigator, click the Generate Block Design command under the IP INTEGRATOR header. In the resulting dialog box, Out of context per IP or Out of context per Block Design, then click Generate. Global will revert to Out of context per Block Design to confirm to DFX rules.

Figure 1. Generate Output Products for design_1.bd