Programmable Units (PU) are the minimum required resource set for partial reconfiguration. The granularity varies based on the resource type and architecture family. In 7 series, this recommended minimum size is a clock-region high column of a single resource – aligning to a clock region allows dedicated initialization to be done. In AMD UltraScale™ and newer architectures, adjacent sites share a routing resource (or Interconnect Tile), a PU is defined in terms of pairs. Specific details are shown in the Design Considerations chapters for UltraScale and AMD Versal™ devices.
One technique that can be used in floor planning is to build out to the fundamental programmable unit from any site that is needed within a Pblock. You can identify a fundamental PU by working outwards from any site like so:
get_sites -of_objects [get_tiles -pu -of_objects [get_tiles -of_objects [get_sites <site>]]]
For example, the programmable unit for side-by-side SLICE sites can be found in this manner:
resize_pblock pblock_rp1 -add [get_sites -of_objects [get_tiles -pu -of_objects [get_tiles -of_objects [get_sites SLICE_X36Y259]]]]
This returns the base PU showing the pair of CLBs within a SLICE with the shared interconnect between them.
This technique is more typically useful when the site in question is less frequently used, such as clocking or IO resources, or Interlaken or PCIe® . If a clock modifying block such as an MMCM is desired, the resulting PU is a full IO bank.
resize_pblock pblock_rp1 -add [get_sites -of_objects [get_tiles -pu -of_objects [get_tiles -of_objects [get_sites MMCM_X0Y1]]]]
In this figure of an IO PU, the MMCM is marked in blue.
Looking more closely, you can see that a column of CLBs is part of this PU.