Adding Low Speed Peripherals (AXI4-Lite) - 2023.2 English

ISE to Vivado Design Suite Migration Guide (UG911)
Document ID
UG911
Release Date
2023-11-01
Version
2023.2 English
  1. Add the equivalent IP to the block diagram. For example, for AXI GPIO:
    1. Right-click anywhere in the block diagram and select Add IP.
    2. Search for and double-click AXI GPIO to add the IP.
  2. Double-click the instance (for example, axi_gpio_0) to configure the IP. Open the MHS and match the settings as closely as possible. Parameters might have been added, modified or removed. If possible, apply the peripheral IP settings (Board-based I/O Constraints) based upon the board (such as led_8bits).
  3. Click OK.
    Note: Parameter verification is discussed in Verifying Parameters between XPS and IP Integrator Designs for AXI Masters and Slaves in a MicroBlaze Processor-Based Design.
  4. Run Connection Automation on the slave interface of the IP. For example, the /axi_gpio_0/S_AXI interface.
  5. Connect to the proper AXI Interconnect instance. This would be /microblaze_0 (Periph), using the microblaze_0_axi_periph instance.
  6. Connect any other clocks, resets, or other signals. The method for external signal connection is similar to that used for XPS designs. If possible, use Connection Automation on external interfaces. For example, the /axi_gpio_0/GPIO interface.