In a microprocessor-based design (such as a MicroBlaze processor design or Zynq 7000 device design containing a MicroBlaze processor), an ELF file generated in the Vitis software development platform (or in another software development tool) can be imported and associated with a block design in Vivado. You can then program the bitstream along with the ELF file from Vivado and run it on target hardware. The process is same between XPS and the IP integrator.
See the Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994) for more information.