Customizing Addresses to Match the XPS Design - 2023.2 English

ISE to Vivado Design Suite Migration Guide (UG911)
Document ID
UG911
Release Date
2023-11-01
Version
2023.2 English
Important: You must perform the steps in this section to match addresses for the design because Design Automation sets the addresses and address size. These steps ensure compatibility with existing software.
  1. In a text editor, open the MHS file and select Address Editor in the block design.
  2. For each AXI slave or LMB block RAM in the MHS, obtain:
    • PARAMETER C_BASEADDR
    • PARAMETER C_HIGHADDR
  3. Enter the C_BASEADDR value under the Offset Address for the AXI slave or LMB block RAM.
  4. Ensure the C_HIGHADDR matches the High Address column for the AXI slave or LMB block RAM. If there is a mismatch, adjust the Range column for the AXI Slave or LMB block RAM to match the C_HIGHADDR.

    If there are multiple AXI masters connected to an AXI slave, be sure to change the address on the multiple AXI masters for the Offset Address. For example, microblaze_0/Data and microblaze_0/Instruction.