Generating System Infrastructure (MicroBlaze, AXI_Interconnect, Clk_Wiz, Proc_Sys_Reset) - 2023.2 English

To generate a system infrastructure (MicroBlaze, AXI_Interconnect, Clk_Wiz, and Proc_Sys_Reset):

1. Create a Vivado project with the desired board or programmable device.
2. In the Flow Navigator, click IP Integrator and select Create Block Design.
3. Enter the Design name: for example: design_1. This generates the block design.
   Important: If MIG is in the design, follow the steps on Migrating AXI MIG before proceeding further.