An interface is a grouping of signals that share a common function, containing both individual signals and multiple buses. An AXI4-Lite master, for example, contains a large number of individual signals plus multiple buses, which are all required to make a connection. By grouping these signals and buses into an interface, the Vivado IP integrator can identify common interfaces and automatically make multiple connections in a single step.
An interface is defined using the IP-XACT standard. Standard interfaces provided by AMD can be found in the Vivado tools installation directory at data/ip/interfaces. See the Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994) for more information on interface nets, pins, and ports.
A block design interface net, or a bd_intf_net object, connects the interface pins on a block design cell to other interface pins, or to external interface ports. The bd_intf_net object connects through multiple levels of the design hierarchy, connecting block design cells. Every interface net has a name which identifies it in the design. All block design cells, interface pins, and interface ports connected to these nets are electrically connected.
As seen in figure above, the block design interface net, bd_intf_net object,
occurs in a block design, or diagram. It is connected to interface ports (
bd_intf_port), and through interface pins (
bd_intf_pin) to block design cells (bd_cell) in the
diagram. You can query the bd_intf_nets of the diagram, bd_cell, bd_intf_pin, and
get_bd_intf_nets -of_objects [get_bd_ports]
In addition, you can query the block design cells (bd_cell) or the bd_intf_pins or bd_intf_port objects that are connected to a specific bd_intf_net:
get_bd_cells -of_objects [get_bd_intf_nets /INTERRUPT_1_1]
The properties on the bd_intf_net object include the following:
Property Type Read-only Visible Value CLASS string true true bd_intf_net NAME string false true microblaze_0_axi_periph_to_s00_couplers PATH string true true /microblaze_0_axi_periph/microblaze_0_axi_periph_to_s00_couplers
To report the properties for the bd_intf_net object, you can copy and paste the following command into the Vivado Design Suite Tcl shell or Tcl Console:
report_property -all [lindex [get_bd_intf_nets] 0]