This chapter provides information about AMD Vivado™ Design Suite properties. The entry for each property contains the following information, where applicable:
- Description of the property, including its primary uses.
- The AMD FPGA Architectures supporting the property, including AMD UltraScale™ architecture devices, except where specifically noted.
- The Applicable Objects or device resources supporting the property.
- Possible Values that can be assigned to the property.
- Syntax specifications, including Verilog, VHDL, and XDC where applicable.
- Affected Steps in the design flow where the property has influence.
- Related Information cross references to related properties.
For more information on the use of these properties within the Vivado Design Suite, refer to the Vivado Design Suite User Guide: Using Constraints (UG903).