The AXI4-Stream video interface supports dual or quad pixels per clock with 8 bits, 10 bits, 12 bits and 16 bits per component for RGB, YUV444, and YUV420 color spaces. When the parameter, Max Bits Per Component, is set to 16, This Figure shows the data format for quad pixels per clock to be fully compliant with the AXI4-Stream video protocol.
A data format for a fully compliant AXI4-Stream video protocol dual pixel per clock is illustrated in This Figure .
When the parameter, Max Bits Per Component, is set to 12, video formats with actual bits per component larger than 12 is truncated to the Max Bits Per Component. The remaining least significant bits are discarded. If the actual bits per component is smaller than Max Bits Per Component set in the Vivado® IDE, all bits are transported with the MSB aligned and the remaining LSB bits are padded with 0. This applies to all Max Bits Per Component settings.
As an illustration, when Max Bits Per Component is set to 12, This Figure shows the data format for quad pixels per clock to be fully compliant with the AXI4-Stream video protocol. A data format for a fully compliant AXI4-Stream video protocol with dual pixels per clock is illustrated in This Figure .
When the parameter, Max Bits Per Component , is set to 12, video formats with actual bits per component larger than 12 is truncated to the Max Bits Per Component. The remaining least significant bits are discarded. If the actual bits per component is smaller than Max Bits Per Component set in the Vivado IDE, all bits are transported with the MSB aligned and the remaining LSB bits are padded with 0. This applies to all Max Bits Per Component settings.
As an illustration, when Max Bits Per Component is set to 12, This Figure shows the data format for quad pixels per clock to be fully compliant with the AXI4-Stream video protocol. A data format for a fully compliant AXI4-Stream video protocol with dual pixels per clock is illustrated in This Figure .
The video interface can also transport quad and dual pixels in the YUV420 color space.
Similarly, for YUV 4:2:0 deep color (10, 12, or 16 bits), the data representation is the same. The only difference is that each component carries more bits (10, 12, and 16). When transporting using AXI4-Stream, the data representation need to be compliant to the protocol defined in this user guide. With the remapping feature, the same native video data will be converted into AXI4-Stream formats, which is shown in This Figure . The 4:2:0 format adds vertical subsampling to the 4:2:2 format, which is implemented in Video over AXI4-Stream by omitting the chroma data on every other line.
Note: For RGB/YUV444/YUV422, Video data are directly mapped from AXI4 Stream to Native Video interface without any line buffer. Therefore, This Figure to This Figure are common to represent data interface for both AXI4 Stream and Native Video. The control signals are omitted in the figures.
The subsystem provides full flexibility to construct a system using the configuration parameters, maximum bits per component and number of pixels per clock. Set these parameters so that the video clock and link clock are supported by the targeted device. For example, when dual pixels per clock is selected, the AXI4-Stream video need to run at higher clock rate comparing with quad pixels per clock design. In this case, it is more difficult for the system to meeting timing requirements. Therefore the quad pixels per clock data mapping is recommended for design intended to send higher video resolutions.
Some video resolutions (for example, 720p60) have horizontal timing parameters (1650) which are not a multiple of 4. In this case the dual pixels per clock data mapping must be chosen.