Revision History - 1.0 English

AXI4-Stream Video IP and System Design Guide (UG934)

Document ID
UG934
Release Date
2022-11-16
Version
1.0 English

The following table shows the revision history for this document.

Date

Version

Revision

11/16/2022

2.3

Updated This Figure to 10-bit.

10/30/2019

2.2

Removed diagrams in Example Multi Pixel Encoding.

12/10/2018

2.2

Updated for Interlaced System design and added Example Pixel packing diagrams.

10/05/2016

2.2

Updated Dynamic TDATA Configuration section with additional examples (RAW14 and RGB888).

04/06/2016

2.2

Updated for Encoding section.

09/30/2015

2.2

Updated pixel alignment in the Dynamic TDATA Configuration section.

04/02/2014

2.1

Updated Introduction chapter for the expansion of the video protocol to multiple pixels transferred over one AXI4-Stream DATA beat.

06/19/2013

2.0

Added Video Subsystem Software Guidelines and Video Subsystem Bandwidth Requirements sections. Removed Core Generator support.

07/25/2012

1.0

Initial Xilinx release.