When output interface cores are used in conjunction with a frame buffer (see Periodic Input Stream, Unconstrained Output Stream, No Frame Buffer ), output timing signal generation should start immediately after timing has locked, regardless of whether an external frame sync pulse is present.
When an out-of-sync external frame sync pulse is received, output timing generation should re-initialize. A new fsync pulse should be generated for the AXI-VDMA, and input pixels from the existing frame should be dropped until the arrival of the SOF pulse. If necessary, a blank frame should be sent on the output until sync is reestablished.
If the external frame sync pulse is not present when expected, output timing generation should continue freewheeling.
Input Interface cores should not start sending incomplete frames. If the timed video source is disconnected or reconnected, or when the system recovers from reset or power-up, the input AXI4-Stream interface core should wait until the start of the first frame after timing is locked before sending data over the AXI4-Stream master interface.