Using the Synplify Pro Synthesis Tool and Vivado Design Suite to Debug a Design - 2022.1 English

Vivado Design Suite Tutorial: Programming and Debugging (UG936)

Document ID
UG936
Release Date
2022-05-20
Version
2022.1 English
This simple tutorial shows how to do the following:
  • Create a Synplify Pro project for the wave generator design.
  • Mark nets for debug in the Synplify Pro constraints file as well as VHDL source files.
  • Synthesize the Synplify Pro project to create an EDIF netlist.
  • Create a Vivado┬« project based on the Synplify Pro netlist.
  • Use the Vivado IDE to setup and debug the design from the synthesized design using Synplify Pro.