report_clock_utilization command provides
details on clock primitive utilization. Observe the architecture clocking rules to avoid
downstream placement issues. Invalid placement constraints or very high fanout for
regional clock buffers might cause issues in the placer. For designs with very high
clock buffer utilization, it might be necessary to lock the clock generators and some
regional clock buffers to aid placement.
For some interfaces needing very tight timing relationship, it is sometimes better to lock specific resources for these signals which need very tight timing relationship, for example, source synchronous interfaces. In general, as a starting point for your design, lock only the I/Os unless there are specific reasons not to follow this approach as cited above.