Following are general guidelines:
- Group the same interface data, address, and control pins into the
same bank. If you cannot group these components into the same bank, group them into
adjacent banks.Note: For SSI technology devices, adjacent banks must also be located within the same super logic region (SLR).
- Place the following interface control signals in the middle of the data buses they control: clocking, enables, resets, and strobes.
- Place very high fanout, design-wide control signals towards the
center of the device.Note: For SSI technology devices, place the signals in the SLR located in the middle of the SLR components they drive.