IBUFDS_GTE2 - 2023.2 English

Vivado Design Suite 7 Series FPGA and Zynq 7000 SoC Libraries Guide (UG953)

Document ID
UG953
Release Date
2023-10-18
Version
2023.2 English

Primitive: Gigabit Transceiver Buffer

Introduction

IBUFDS_GTE2 is the gigabit transceiver input pad buffer component in 7 series devices. The REFCLK signal should be routed to the dedicated reference clock input pins on the serial transceiver, and you should instantiate the IBUFDS_GTE2 primitive in your design. See the 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476) for more information on PCB layout requirements, including reference clock requirements.

Design Entry Method

Instantiation Yes
Inference No
IP Catalog Recommended
Macro support No

VHDL Instantiation Template

Unless they already exist, copy the following two statements and paste them before the entity declaration.
Library UNISIM;
use UNISIM.vcomponents.all;

-- IBUFDS_GTE2: Gigabit Transceiver Buffer
--              7 Series
-- Xilinx HDL Language Template, version 2023.2

IBUFDS_GTE2_inst : IBUFDS_GTE2
generic map (
   CLKCM_CFG => TRUE,    -- Refer to Transceiver User Guide
   CLKRCV_TRST => TRUE,  -- Refer to Transceiver User Guide
   CLKSWING_CFG => '11'  -- Refer to Transceiver User Guide
)
port map (
   O => O,         -- 1-bit output: Refer to Transceiver User Guide
   ODIV2 => ODIV2, -- 1-bit output: Refer to Transceiver User Guide
   CEB => CEB,     -- 1-bit input: Refer to Transceiver User Guide
   I => I,         -- 1-bit input: Refer to Transceiver User Guide
   IB => IB        -- 1-bit input: Refer to Transceiver User Guide
);

-- End of IBUFDS_GTE2_inst instantiation

Verilog Instantiation Template


// IBUFDS_GTE2: Gigabit Transceiver Buffer
//              7 Series
// Xilinx HDL Language Template, version 2023.2

IBUFDS_GTE2 #(
   .CLKCM_CFG("TRUE"),   // Refer to Transceiver User Guide
   .CLKRCV_TRST("TRUE"), // Refer to Transceiver User Guide
   .CLKSWING_CFG(2'b11)  // Refer to Transceiver User Guide
)
IBUFDS_GTE2_inst (
   .O(O),         // 1-bit output: Refer to Transceiver User Guide
   .ODIV2(ODIV2), // 1-bit output: Refer to Transceiver User Guide
   .CEB(CEB),     // 1-bit input: Refer to Transceiver User Guide
   .I(I),         // 1-bit input: Refer to Transceiver User Guide
   .IB(IB)        // 1-bit input: Refer to Transceiver User Guide
);

// End of IBUFDS_GTE2_inst instantiation

Related Information

  • 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
  • 7 Series FPGAs SelectIO Resources User Guide (UG471)