Product - 2020.2 English

Vivado Design Suite Reference Guide: Model-Based DSP Design Using System Generator (UG958)

Document ID
UG958
Release Date
2020-11-18
Version
2020.2 English

This block is listed in the following Xilinx® Blockset libraries: DSP, Math, and Index.

The Xilinx Product block implements a scalar or complex multiplier. It computes the product of the data on its two input channels, producing the result on its output channel. For complex multiplication the input and output have two components: real and imaginary.

The Product block is ideal for generating a simple scalar or complex multiplier. If your implementation will use more complicated features such as AXI4 ports or a user-specified precision, use the Xilinx Complex Multiplier 6.0 block (if you are configuring a complex multiplier) or Xilinx Mult block (if you are configuring a scalar multiplier) in your design instead of the Product block.

In the Vivado® design flow, the Product block is inferred as " LogiCORE™ IP Complex Multiplier" (if you have configured the Product block for complex multiplication) or “LogiCORE IP Multiplier” (if you have configured the Product block for scalar multiplication) for code generation. Refer to the LogiCORE IP Complex Multiplier v6.0 Product Guide or the LogiCORE IP Multiplier v12.0 Product Guide for details about these LogiCORE IP.

Block Parameters

The block parameters dialog box can be invoked by double-clicking the icon in your Simulink® model.

Parameters specific to the block are as follows.

Complex Multiplication
Specifies mode of operation: scalar multiplier (Complex Multiplication deselected) or complex multiplier (Complex Multiplication selected).
Optimize for
Specifies whether your design will be optimized for Performance or for Resources when it is implemented in the Xilinx FPGA or SoC device.

Based on the settings for Complex Multiplication and Optimize for, and rate and type propagation (from the input data width), the latency value of the block will be derived automatically for a fully pipelined circuit. This latency value will be displayed on the block in the Simulink model.