Concepts - 2023.2 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2023-10-18
Version
2023.2 English
Table 1. Terminology
Term Definition
Bus Interface

A grouping of signals that share a common function, see Using Bus Interfaces.

A Master Bus Interface initiates a bus transaction, often named m<index>_axi or similar, where <index> is a number like 00. A Master Bus Interface provides access to a master's Address Space.

A Slave Bus Interface responds to a bus transaction, often named s<index>_axi or similar, where <index> is a number like 00. A Slave Bus Interface provides access to one or more Slave Segments, which can be assigned into a master's Address Space.

Tcl: get_bd_intf_pins

Slave Segment

An addressable region of memory or registers accessible through a Slave Interface. A slave segment can be assigned into a master's address space.

A slave segment has a range (size). A master may access all or part of a slave segment.

Typically a slave segment is floating meaning it can be assigned at any legal offset in a master's address space.

A Fixed Slave Segment has a fixed offset where it must be assigned within a master's Address Space.

Note: Previously, and in IP-XACT, a Slave Segment was called an Address Block.

Tcl: get_bd_addr_segs (returns both master segments and slave segments)

Address Space

A master's addressable range where slave segments can be assigned. One address space may be shared by multiple Master Interfaces. A master may have multiple address spaces.

Tcl: get_bd_addr_spaces

Master Segment

An assignment of a Slave Segment into a master's Address Space. It has an offset and range, and is saved with the master's Address Space.

A Master Segment is also created when excluding a slave segment from a Master's address space.

Note: Previously, and in IP-XACT, a Master Segment was called an Address Segment.

Tcl: get_bd_addr_segs (returns both master segments and slave segments)

Address Width

The Address Width is the bit width of an address bus. It determines the maximum addressable high address. An interface with an address width of N can address from 0 to 2^N-1.

Some masters and IP have fixed address widths. Some IP such as a SmartConnect will auto-adjust their address width to accommodate all assigned network addresses.

Aperture

An offset and range that restricts address assignment. Some master interfaces and some interconnect interfaces have apertures. Address assignments must fit within apertures seen across the address path.

A bus interface may have one or more explicit apertures. If a bus interface does not have an explicit aperture then its aperture is the full range given by its address width. The address width of interconnect IP (e.g., SmartConnect) is normally calculated to accommodate all address assignments it needs to support.

Apertures are shown in the properties window of an interface and in the address path properties window.

Excluded Address A mechanism to explicitly mark a slave as not accessible by a master to ensure an interconnect network (e.g., SmartConnect) is configured to prevent access.
Address Path

An Address Path is the path on the IP integrator block diagram from a Master Interface, through an interconnect network, to a Slave Interface.

The leaf rows of the address editor represent address paths. Selecting a row in the address editor will also select address path on the block diagram, and will show the address path properties window.

Address Network An Address Network is a collection of Address Paths through a shared interconnect network. Each slave in a network must occupy separate network addresses (not overlap). Slaves in different networks can be assigned the same address.