To display block design (BD) layers, click the Settings Button . You can select the Attributes, Nets, and Interface connections that you want to view or hide by selecting or deselecting the associated check boxes.
You can display or hide several attributes of the BD by checking or un-checking the options. The following attributes can be modified.
- Pin tie offs
- Pins that have a tie-off value specified, for example, ‘0’
or ‘1’ can be displayed by checking the Pin tie offs option.Figure 2. Viewing/Hiding Pin Tie-offs on the Pins of IP Symbols
- Pins without parameter propagation
- Show or hide the pins that do not propagate parameters. When
selected, these pins appear on the canvas with icon. Tip: Pins of RTL module reference blocks are an example of the pins through which parameter propagation does not happen.
- Mark Debug
- Show or hide pins that have been marked for debug. Nets
marked for debug have a bug symbol placed on them.Figure 3. Nets Marked for Debug
- Display pins of hidden nets and interfaces
- Works with the Nets or Interface Connections option. If a net has been hidden by un-checking the appropriate net, then the pins that are connected by the net also are hidden. This option displays the pins in question, even though the nets might be hidden.
- System ILA IP and related connections
- Shows or hides the instantiation of the System ILA IP and all the connected nets. When a net is marked for debug, the designer assistance feature offers assistance to connect the net being debugged to a System ILA IP. If there are multiple System ILA IP in the BD, this could unnecessarily clutter the BD canvas. Un-checking this option hides all the System ILA IP instances and all connected nets to them.
Several types of nets such as clock nets, reset nets, data nets or simply other unclassified type of nets can be hidden or shown on the BD canvas by selecting the appropriate check box.
Interface connections can also be shown or hidden by selecting the options under this category.