Interrupt handling depends upon the selected processor.
- For a MicroBlaze™ processor, the AXI Interrupt Controller IP must be used to manage interrupts.
- For a Zynq®-7000 SoC processor or the Zynq MPSoC, the Generic Interrupt Controller block within the Zynq processor handles the interrupt.
Regardless of the processor used in the design, a Concat IP consolidates and drives the interrupt pins. See the previous Concat section for the brief description provided in this guide.
The inputs of the Concat IP are driven by different interrupt sources. Accordingly, you must configure the Concat IP to support the appropriate number of input ports. Set the Number of Ports field to the number of interrupt sources in the design, as shown in the following figure.
dout) is set automatically during parameter propagation.
You can configure several of the parameters for the AXI Interrupt Controller. The following figure shows the parameters available from the Basic tab of the AXI Interrupt Controller, of which several are configurable.
- The Number of Peripheral Interrupts is set automatically during parameter propagation and cannot be set by a user. The value is determined by the number of interrupt sources that are driving the inputs of the Concat IP.
- The Fast Interrupt Mode can be set by the user if low latency interrupt is desired.
- The Peripheral Interrupts Type is set to Auto, which can be overridden by the user by toggling the Auto setting to Manual. In manual mode, you can specify the custom values in these fields.
- The Processor Interrupt Type field offers two choices:
- Interrupt Type
- Level Type or Edge Type, depending on the Interrupt Type setting.
If the Interrupt Type is Edge Interrupt, the other choice is Edge Type. If the Interrupt Type is Level Interrupt, the other choice is Level Type.
You can select if the interrupt source is either Edge-triggered or Level-triggered. Accordingly, you can then also select whether the interrupt is rising or falling edge and, in case of a Level triggered interrupt, the interrupt is active-High or active-Low.
In IP integrator, this value is normally automatically determined from the connected interrupt signals, but can be set manually.
The following figure shows parameters on the Advanced tab of the AXI Interrupt Controller. See the AXI Interrupt Controller (INTC) LogiCORE IP Product Guide (PG099) for details of these parameters.
One option of note is the Asynchronous Clocks option. The AXI Interrupt Controller determines whether the interrupt sources in a design are from the same clock domain or different clock domains.
In the case of interrupts being driven from different clock domains, the Vivado IDE uses the Enable Asynchronous Clock operation automatically. In this case, cascading synchronizing registers are added to the interrupt sources.
The Clocks tab lets you specify the Clock Frequencies so constraints can be generated for the Out-of-context (OOC) synthesis flow.