Every connection through the NoC has an associated quality of service (QoS) requirement. You can set the QoS requirement for each connection through the NoC. The set of desired NoC connections together with their corresponding QoS requirements constitute a traffic specification. The traffic specification is used internally by the NoC compiler to compute a configuration for the NoC.
A QoS requirement has two components:
- Traffic class defines how traffic on the connection is prioritized in the NoC compiler and in the hardware. The traffic class is set at the NMU and is for all paths starting from that NMU.
- Read and write bandwidth requirements describe how much data
bandwidth the connection is expected to consume in each direction. Bandwidth
requirements are associated with the egress port (NoC slave); each connection might have different read
and write bandwidth requirements. Bandwidth can be expressed in units of MB/s or
Gb/s.Note: Bandwidth scales in multiples of 1,000, so Gb/s = 8 * MB/s / 1,000.
The supported traffic classes in priority order are:
- Low Latency
- The NoC compiler minimizes the structural latency while satisfying the bandwidth requirement. Low latency traffic receives a high priority at all switch and memory controller arbitration points. The low latency traffic class only applies to read traffic.
- Includes a mechanism to guarantee the maximum latency of
DDR memory traffic. Isochronous traffic is treated as high priority (low
latency) traffic through the NoC. Once the request is delivered to the
DDRMC queue a timeout counter is started. If the timeout is reached the
request is moved to the front of the queue.Note: In the current release you cannot specify the isochronous timeout latency.
- Best Effort
- The NoC compiler works to satisfy the bandwidth and latency requirements after low latency and isochronous path requirements have been satisfied. Latency values are associated with the egress port (NoC slave). Best effort transactions receive the lowest arbitration priority throughout the NoC.
For more information on NoC performance tuning, see this link in the Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313).