Synthesis - 2022.2 English

Vivado Design Suite User Guide : Hierarchical Design (UG905)

Document ID
UG905
Release Date
2022-10-19
Version
2022.2 English

You must have a top-level netlist with a black box for each partitioned instance. This requires the top-level synthesis to have module/entity declarations for the partitioned instances, but no logic.

The top level synthesis typically infers I/O buffers on all top level ports. However, if I/O buffers are specifically instantiated in an OOC module, you must turn off I/O buffer insertion in the top-level synthesis on a port-by-port basis. For Vivado synthesis, the attribute for this is IO_BUFFER_TYPE = “none.” For more information on IO_BUFFER_TYPE and other synthesis attributes, see this link in the Vivado Design Suite User Guide: Synthesis (UG901).