Receiver Implications

Co-location Deployment Considerations for Direct RF Sampling Transceivers

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The co-location requirements have more impact on the uplink receiver design because it needs to handle a much larger input signal dynamic range. The signal level can be as low as the RX reference sensitivity level specified in 3GPP [REF 1, Section 7.2] and as high as the 16 dBm CW from the co-locating PCS BTS. The 3GPP specification allows a 6 dB desensitization of the receiver under this deployment scenario. However, in practice, the desensitization could be avoided with proper design choices. Furthermore, the 3GPP specification uses a CW for the blocker, but in a real deployment, the blocker comes in the form of wireless carriers such as GSM, WCDMA, LTE, or NR carriers with similar RMS power, and with multiple transmitting carriers.

The high-level block diagram for either RF sampling or ZIF architecture receiver is summarized in the following figure. The analog front end (AFE) is composed of the RF lineup while the DFE includes the analog-to-digital converter (ADC) and the base-band DSP processing blocks. The AFE is mainly composed of filters and amplifiers. The total gain typically ranges from 25 to 40 dB with some adjustability to achieve the desired 2.5 dB system noise figure and be able to handle the 3GPP in-band blocking requirements [REF 1]. Two amplifier stages are generally needed to provide such large gain. These stages come either in two separate devices or in a single device package such as the F0473B from Renasas or the QPB9348 from Qorvo.

Figure 1. High-level Receiver Block Diagram

A design goal of the receiver in co-location deployment is to filter the 16 dBm interferer and any nonlinear products it generates from the active components in the AFE to a level well below the minimum wanted signal prior to the OFDM symbol demodulation. The minimum wanted signal power in this case is the targeted reference sensitivity level for the system. The filtering is provided by a combination of the various filters in the receiver chain that include the antenna BPF, optional BPF (shown in Figure 1 and Figure 2), anti-alias filter, ADC band selection digital down-converter (DDC), and the carrier selection DDC in the DFE baseband DSP. Each of the filter stages serves a slightly different purpose and the rejection needs are dependent on the component selection and the architecture of the receiver.