eFUSE Control Register (FUSE_CNTL) Bit Description

Using Encryption and Authentication to Secure an UltraScale/UltraScale+ FPGA Bitstream Application Note (XAPP1267)

Document ID
XAPP1267
Release Date
2023-02-10
Revision
1.6 English

This register contains user programmable bits used to select AES key usage and set the read/write protection for other eFUSE registers. Table: eFUSE Control Register Bit (FUSE_CNTL) Description provides bit descriptions and recommended settings.

Table  4: eFUSE Control Register Bit (FUSE_CNTL) Description

Bit

Bit Name

Description

Recommended Setting

0

R_DIS_Key

When programmed to 1, this bit disables the CRC check that verifies the AES key and programming of the AES key.

Yes
(program to 1)

1

R_DIS_USER

When programmed to 1, this bit disables reading of the FUSE_USER user code. This does not disable reading the user code through EFUSE_USR component, although it disables reading the user code through the JTAG port.

No
(keep at 0)

2

R_DIS_SEC

When programmed to 1, the bit disables reading of the FUSE_SEC security settings via JTAG.

Yes
(program to 1)

3–4

Reserved

Reserved

5

W_DIS_CNTL

When programmed to 1, this bit disables programming of the FUSE_CNTL bits.

RECOMMENDED: Program this bit to 1 after programming the FUSE_CNTL register bits to prevent unintended changes to the FUSE_CNTL eFUSE bits.

Yes
(program to 1)

6

R_DIS_RSA

When programmed to 1, this bit disables reading of the FUSE_RSA authentication key.

Yes
(program to 1)

7

W_DIS_KEY

When programmed to 1, this bit disables programming of the AES key and CRC check that verifies the key.

RECOMMENDED: Program this bit after programming the key to prevent unintended changes/corruption to the eFUSE AES key value.

Yes
(program to 1)

8

W_DIS_USER

Disable programming of the FUSE_USER user code.

No
(keep at 0 )

9

W_DIS_SEC

When programmed to 1, this bit disables programming of the FUSE_SEC register bits.

RECOMMENDED: Program this bit after programming the FUSE_SEC register to prevent unintended changes/corruption to the FUSE_SEC register.

Yes
(program to 1)

10–14

Reserved

Reserved

15

W_DIS_RSA

When programmed to 1, this bit disables programming of FUSE_RSA authentication key.

Pending customer security requirements

16

W_DIS_USER_128

When programmed to 1, this bit disables programming of FUSE_USER_128 user code.

17–23

Reserved

Reserved UltraScale bits extend through bit 20 and reserved UltraScale+ bits extend through bit 23.