Summary

Fast Partial Reconfiguration Over PCI Express (XAPP1338)

Document ID
XAPP1338
Release Date
2019-03-11
Revision
1.0 English

Designers often want to minimize the amount of time it takes to load a partial bitstream over a PCI Express® interface. For high-speed or time-sensitive applications that must partially reconfigure quickly, a PCIe® -based DMA can reduce load times, and it can make loading a partial bitstream up to 250 times as fast as a typical load over the embedded media configuration access port (MCAP) path. This solutions shows a simple example (based on AXI4 protocols) that can be customized and dropped into a new or existing design.

The example design targets two different Xilinx® evaluation boards:
  • Kintex® UltraScale+™ on the KCU116 Evaluation Board
  • Virtex® UltraScale+™ on the VCU118 Evaluation Board

For more information, see the following guides:

  • DMA/Bridge Subsystem for PCI Express Product Guide (PG195)
  • Vivado Design Suite User Guide: Partial Reconfiguration (UG909)

Download the reference design files for this application note from the Xilinx® website. For detailed information about the design files, see Reference Design.