Synchronization of Signal Processing in Multiple RF Data Converter Subsystems (XAPP1349)

Document ID: XAPP1349
Release Date: 2022-02-17
Revision: 1.0 English

Summary
Introduction
Basic Theory
Digital Datapath
Dual Clock FIFO
Algorithm Illustration
Sources of Misalignment
Misalignment in Programmable Logic
Signal Trace Mismatch
Deterministic Latency
Practical Application of MTS
Lab Measurements
Measurement Setup
MTS Results
Conclusion
References
Revision History
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