Configure and Generate a RX Advanced I/O Wizard Core

XPHY I/O Source Synchronous Interfaces (XAPP1350)

Document ID: XAPP1350
Release Date: 2021-02-04
Revision: 1.0 English

Summary
Introduction
Single-Bank Source Synchronous Design
Pre-Core Generation Setup
Introduction to Deserialization and Data Reception
Data Reception
Configure and Generate a RX Advanced I/O Wizard Core
Generating a RX Core
Receiver Design Considerations
Introduction to Serialization and Data Transmission
Data Transmission
Configure and Generate a TX Advanced I/O Wizard Core
Generating a TX Core
Transmitter Design Considerations
Top-Level using TX and RX Advanced I/O Wizard Cores
Simulation
Simulating the Design
Reference Design
Multi-Bank Source Synchronous Design
Pre-Core Generation Setup
Introduction to Deserialization and Data Reception
Data Reception
Configure and Generate a RX Advanced I/O Wizard Core
Generating a RX Core
Receiver Design Considerations
Introduction to Serialization and Data Transmission
Data Transmission
Configure and Generate a TX Advanced I/O Wizard Core
Generating a TX Core
Transmitter Design Considerations
Top-Level using TX and RX Advanced I/O Wizard Cores
Simulation
Simulating the Design
Reference Design
Conclusion
References
Revision History
Please Read: Important Legal Notices

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