Data Interleaving

Digital Down-conversion Chain Implementation on AI Engine (XAPP1351)

Document ID
XAPP1351
Release Date
2021-02-15
Revision
1.0 English

The half-band decimation filter is symmetric and needs two input samples to compute each output. This turns out to be difficult for the kernel design to achieve a perfect loop when the filter has many taps. A solution to the problem is to put an even/odd interleaver in front of the half-band filter to avoid the odd samples being loaded into the registers multiple times. The following figure is an example of an HBF47 implementation result that achieves a perfect inner loop.

Figure 1. HBF47 Compiling Result