Regions Register

Memory and Peripheral Protection Unit for PL Isolation in Zynq UltraScale+ Devices (XAPP1353)

Document ID
XAPP1353
Release Date
2022-05-04
Revision
v1.1 English

The regions register is shown in the following table. The table displays the number of secure regions enabled. It is a read only register.

Table 1. Regions (XMPU_PL) Register Bit-Field Summary
Field Name Bits Type Reset Value Description
Reserved 31:5 ro 0x0 Reserved
ENABLED 4:0 ro 0x0

Number of active regions

Note: There are 16 available regions that are independently enabled in the R[region]_CONFIG registers.