Xilinx tools compile the graph design and automatically generate block diagrams to represent the compilation result. The following figure shows an example of the reference design which instantiates two FFT modules in a 5x2 AI Engine array. Every colored oval represents one AI Engine, and the gray boxes are DMAs and packet switches required by the design. Xilinx tools automatically configure the DMAs, AXI switches, and PL-AI Engine interfaces according to the graph design.
Figure 1. AI Engine Compilation Result of FFT Reference Design
