Introduction

Simplified Power Sequencing (XAPP1375)

Document ID
XAPP1375
Release Date
2023-04-27
Revision
1.1 English

With the advancement in FPGA, SoC, and adaptive SoC technology, the level of integration and compute performance that can be achieved with AMD devices is higher than ever. Applications are dynamically customizable in both hardware and software to meet the challenges of any workload, and can be easily used by both software and hardware developers.

With this advancement, the complexity and flexibility of these devices has increased, and the power requirements require more hands-on and carefully considered solutions to meet the power demands. The challenge of designing a power delivery network (PDN) has intensified as the number of voltage rails required increases, higher load currents, steeper slew rates, and power management have become a necessary product of leading technologies. Despite this, it is easier than ever to efficiently and optimally power AMD devices using the AMD power estimation tools. A large portfolio of diverse power delivery solutions is available from AMD and power partners to effectively enable any AMD design. See References for links to these tools.

As the power requirements increase in overall complexity, power sequencing can be easily overlooked even though it is crucial to an optimal and reliable design. This application note guides you through the multiple sequencing options to help you select a method that best suits your needs.