Power Management Bus and I2C

Simplified Power Sequencing (XAPP1375)
Document ID
XAPP1375
Release Date
2023-04-27
Revision
1.1 English

The PMBus and I2C are useful communication protocols for digital power management between the VRMs and system controllers. The PMBus is a variant of the system management bus (SMBus) that is based on I2C, and although they are similar physically, each protocol has minor differences and are used for different functions.

The benefit of the PMBus over other protocols derives from its standardized commands allowing for compatibility with many digital power ICs from different manufacturers without adjusting commands that would be device specific using I2C.

The PMBus also allows for manufacturer commands listed after the PMBus specific commands applicable to the manufacturer's VRM. Different power vendors support different command sets. It is important to check the power IC data sheet because some commands might not be supported.

The PMBus can be implemented with either two or three pin configurations and uses a primary/secondary communication protocol. At a minimum, the PMBus has a clocking pin (SCL) and a data (SDA) pin. An optional PMBUS_ALERT pin can be asserted when a secondary device requires the primary to initiate communications, such as in an over temperature or over voltage condition. The primary drives the clocking for all communication between the devices. Versal devices can operate in either primary or secondary mode via the Linux drivers running in the PS, and can operate in secondary mode if using the PMC.
Note: PMBus access on some devices can give the user visibility on the current and power of the design to give a better understanding of power and thermal limits subject to voltage regulator capabilities.

For more information on PMBus, see the Current PMBus Specifications website.

Figure 1. PMBus Physical Diagram

When choosing a PMBus/I2C enabled or GPIO method of sequencing, keep in mind that the PMBus/I2C protocols have specified timings and must be routed to pins in groups, which could be limited. GPIOs are more flexible and can be mixed through MIO and extended MIO (EMIO).