PCB Channel Design Guidelines for 112 Gbps GTM Transceivers (XAPP1392)

Document ID: XAPP1392
Release Date: 2023-05-23
Revision: 1.0 English

Summary
Introduction
Channel Insertion Loss
Impedance Discontinuity
Via Impedance Optimization
SMD Footprint Optimization
Optimal Channel Nominal Impedance
Crosstalk
Intra-pair Skew
Intra-pair Trace Length Matching
System-Level SI Analysis
Guidance for C4072 Package PCB Breakout
C4072 BGA Pin Pattern Examples
PCB Stackup and Via Construction for Example PCB Breakout Design
TX-to-TX/RX-to-RX Crosstalk Analysis for 56 Gbps Full-density Quad Usage
TX-to-RX Crosstalk Analysis for 56 Gbps Full-density Quad Usage
Optimal Breakout Layer Assignment for Crosstalk Mitigation
Crosstalk Analysis for 112 Gbps Half-density (2 × GT) Quad Usage
C4072 Package PCB Breakout Design Guidance
Reference Design
Conclusion
References
Revision History
Please Read: Important Legal Notices

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