Nets - 2022.1 English

Versal ACAP AI Engine Programming Environment User Guide (UG1076)

Document ID
UG1076
Release Date
2022-05-25
Version
2022.1 English

The Nets table shows details of the net connections made between the AI Engine kernels, or the AI Engine kernel and the PLIO/GMIO ports. For example, in the snippet of graph.cpp file shown in the following you can see examples of the connect constraint used to connect to the stream and window connections between the AI Engine kernels in the graph or to the PLIO/GMIO ports.

connect< window >(in.out[0], interpolator.in[0]);
connect< window, stream >(interpolator.out[0], clip_in.[0]);
connect< stream >(clip_out.out[0], classify.in[0]);
connect< window >(classify.out[0], out.in[0]);
Figure 1. Nets Table
Table 1. Column Description
Column Description
Name The name of the net that is internally generated.
Variable The name of the net connection (which can be optionally specified in the connect constraint). <unnamed>.net# signifies that the connect<> has no unique naming as part of the connect constraint in the graph .
Source Graph Node The source node of the graph connection which could be a AI Engine kernel, PLIO or GMIO node.
Source Port The source port of the graph connection which could be a AI Engine kernel, PLIO or GMIO port.
Source ID The unique ID the aiecompiler designates the source port.
Destination Graph Node The destination node of the graph connection which could be a AI Engine kernel, PLIO or GMIO node.
Destination Port The destination port of the graph connection which could be a AI Engine kernel, PLIO or GMIO port.
Destination ID The unique ID that the AI Engine compiler designates the destination port.
Latency (Cycles) The minimum cycle count needed to transfer data from the source node to destination node.
FIFO Depth (Words) The FIFO memory allocated through routing resources in the net. This includes buffers configured as DMA FIFOs, stream switch ports, and stream switch FIFOs. The unit for FIFO depth is 32-bit words.
FIFO Depth Constraint This reflects the FIFO depth constraint provided in the design.
Buffers The number of buffers used by the net connection.
Switch Count The number of switches traversed by the net connection.
Switch FIFOs The number of stream switch FIFOs used by the net connection.