Configuration Options - 4.1 English

DPUCZDX8G for Zynq UltraScale+ MPSoCs Product Guide (PG338)

Document ID
PG338
Release Date
2023-01-23
Version
4.1 English

The DPUCZDX8G can be configured with some predefined options, which includes the number of DPUCZDX8G cores, the convolution architecture, DSP cascade, DSP usage, and UltraRAM usage. These options allow you to set the DSP slice, LUT, block RAM, and UltraRAM usage. The following figure shows the configuration page of the DPUCZDX8G.

Figure 1. DPUCZDX8G Configuration – Arch Tab

The following sections describe the configuration options.