Figure 1. Advanced Settings Tab
- Enable Slot Clock Configuration
- When this option is selected, the link is synchronously clocked, that
is, whether the device reference clock would be provided synchronously by the connector or
asynchronously through an onboard PLL. For more
information on clocking options, refer to the Clocking section in the
UltraScale+
Devices Integrated Block for PCI Express LogiCORE IP Product
Guide (PG213).
Figure 2. Async Modes
- SYNC Mode
- Common clock / Synchronous
- Enable Slot Clock Configuration = TRUE
- RX_PPM_OFFSET = 0
- RX_SSC_PPM = 0
- ASYNC Mode
- Common clock / Synchronous
- Enable Slot Clock Configuration = TRUE
- RX_PPM_OFFSET = 0
- RX_SSC_PPM = 0
- SRIS Mode
- Async with SSC
- Enable Slot Clock Configuration = FALSE
- RX_PPM_OFFSET = 600
- RX_SSC_PPM = 5000
- SRNS Mode
- Async with No SSC
- Enable Slot Clock Configuration = FALSE
- RX_PPM_OFFSET = 600
- RX_SSC_PPM = 0
- TX Preset
- It is not advisable to change the default value of 4. Preset value of 5 might work better on some systems.
- Form factor driven Insertion loss adjustment
- Indicates the transmitter to receiver insertion loss at the Nyquist frequency depending on the form factor selection. There are three available options: Chip to Chip, Add-in Card, and Backplane in the menu, corresponds to 5 dB, 15 dB, and 20 dB insertion loss, respectively. Also, this parameter internally sets LPM mode for the Chip to Chip option, and DFE mode for all others in the GTs.
- Receiver Detect
- Indicates the type of Receiver Detect Default or Falling Edge. This parameter is only available for UltraScale devices. For more information about this option, see the UltraScale Architecture GTH Transceivers User Guide (UG576).
- ASPM Support Option
- This parameter is only available for UltraScale+™ devices. The available options are No_ASPM, L0s Supported and L1 Supported. Select the option that is the same as that supported in the MAC.
- GT Channel DRP
- This parameter is only available for UltraScale+ devices. It enables GT DRP ports.