Graphical User Interface - 6.2 English

Video Timing Controller Product Guide (PG016)

Document ID
PG016
Release Date
2023-11-03
Version
6.2 English

The Video Timing Controller core is easily configured to meet the developer's specific needs through the Vivado tools graphical user interface ( This Figure and This Figure ). This section provides a quick reference to parameters that can be configured at generation time.

Figure 4-1: Vivado IP Catalog GUI - Main Window

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Figure 4-2: Vivado IP Catalog GUI - Default/Constant Mode Options Tab

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Figure 4-3: Vivado IP GUI - Frame Sync Position Tab

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The GUI displays a representation of the IP symbol on the left side and the parameter assignments on the right side, described as follows:

Component Name: The component name is used as the base name of output files generated for the module. Names must begin with a letter and must be composed from characters: a to z, 0 to 9 and “_”.

Note: The name v_tc_v6_2 is not allowed.

Optional Features :

° Include AXI4-Lite Interface : When selected, the core is generated with an AXI4-Lite interface, which gives access to dynamically program and change processing parameters. For more information, refer to Core Interfaces .

° Include INTC Interface : When selected, the core generates the optional INTC_IF port, which gives parallel access to signals indicating frame processing status and error conditions. For more information, refer to Interrupts .

- Interlaced Video Support : When selected, the core is generated with interlaced video detection and/or generation enabled.

- Synchronize Generator to Detector or to fsync_in : When selected, the timing generator automatically synchronizes to the detector or to the fsync_in input port. Otherwise, the generator runs in free-run mode.

Options :

° Maximum Clocks per Line : This parameter sets the maximum number of clock cycles per video line that the Video Timing Controller can generate or detect. Values of 128, 256, 512, 1024, 2048, 4096, 8192, and 16,384 are valid.

° Maximum Lines per Frame : This parameter sets the maximum number of lines per video frame that the Video Timing Controller can generate or detect. Values of 128, 256, 512, 1024, 2048, 4096, 8192, and 16,384 are valid.

° Frame Syncs : This parameter sets the number of frame synchronization outputs to generate and supports up to 16 independent outputs.

° Enable Generation : This parameter enables or disables the video timing outputs.

° Enable Detection : This parameter enables or disables the detecting the timing of the video inputs.

° Generation Options :

- Field ID Generation : This parameter enables or disables generating the field ID output.

- Vertical Blank Generation : This parameter enables or disables generating the vertical blank output.

- Horizontal Blank Generation : This parameter enables or disables generating the horizontal blank output.

- Vertical Sync Generation : This parameter enables or disables generating the vertical synchronization output.

- Horizontal Sync Generation : This parameter enables or disables generating the horizontal synchronization output.

- Active Video Generation : This parameter enables or disables generating the active video output.

- Active Chroma Generation : This parameter enables or disables generating the active chroma output.

- Auto Generation Mode : When enabled, this parameter will cause the generated video timing outputs to change based on the detected inputs. If this parameter is disabled, the video timing outputs will be generated based on only the first detected input format. The output for the generated synchronization signals will continue even if the detection block loses lock. This parameter is available only if both the Enable Generation and Enable Detection parameters are enabled.

Note: This parameter has an effect only if one or more of the source select control register bits are set to Low.

° Detection Options :

- Field ID Detection : This parameter enables or disables detecting the field id input.

- Vertical Blank Detection : This parameter enables or disables detecting the vertical blank input. If the vblank_in input will not be connected, then the Vertical Blank Detection option must be deselected.

- Horizontal Blank Detection : This parameter enables or disables detecting the horizontal blank input. If the hblank_in input will not be connected, then the Horizontal Blank Detection option must be deselected.

- Vertical Sync Detection : This parameter enables or disables detecting the vertical synchronization input. If the vsync_in input will not be connected, then the Vertical Sync Detection option must be deselected.

- Horizontal Sync Detection : This parameter enables or disables detecting the horizontal synchronization input. If the hsync_in input will not be connected, then the Horizontal Sync Detection option must be deselected.

- Active Video Detection : This parameter enables or disables detecting the active video input. If the active_video_in input will not be connected, then the Active Video Detection option must be deselected.

- Active Chroma Detection : This parameter enables or disables detecting the active chroma input. If the active_chroma_in input will not be connected, then the Active Chroma Detection option must be deselected.

Constant/Default Timing Generation Options :

° Video Format :

- Video Mode : This parameter sets the default video format and controls the Horizontal, Vertical and Horizontal Fine Adjustment settings below. Values of 720p, 480p, 1080p, or Custom are valid. The interlaced video modes of 1080i, 480i and 576i are also available when the Interlaced Support parameter is checked. Video Modes are removed or added to this list based upon the sizes selected in the Max Clocks per Line and Max Lines per Frame parameters.

- Chroma Format : This parameter sets the default value of the video format in the GENERATOR ENCODING register at address offset 0x68. This controls the behavior of the active_chroma_out output port.

- Chroma Parity : This parameter sets the default value of the chroma parity in the GENERATOR ENCODING register at address offset 0x68. This controls the behavior of the active_chroma_out output port.

° Horizontal Settings :

- Active Size : This parameter sets the default number of clock cycles per frame (without blanking) in the GENERATOR ACTIVE_SIZE register at address offset 0x060.

- Frame Size : This parameter sets the default number of clock cycles per frame (with blanking) in the GENERATOR HSIZE register at address offset 0x70.

- Sync Start : This parameter sets the default value of the clock cycle count during which the horizontal sync starts in the GENERATOR HSYNC register at address offset 0x78.

- Sync End : This parameter sets the default value of the clock cycle count during which the horizontal sync ends in the GENERATOR HSYNC register at address offset 0x78.

° Frame/Field 0 Vertical Settings :

- Active Size : This parameter sets the default number of lines per frame (without blanking) in the GENERATOR ACTIVE_SIZE register at address offset 0x060.

- Frame Size : This parameter sets the frame/field 0 default number of lines per frame size (with blanking) in the GENERATOR VSIZE register at address offset 0x74, bits 12:0.

- Sync Start : This parameter sets the default value of the line count during which the vertical sync starts in the GENERATOR F0_VSYNC_V register at address offset 0x80.

- Sync End : This parameter sets the default value of the line count during which the vertical sync ends in the GENERATOR F0_VSYNC_V register at address offset 0x80.

° Frame/Field 0 Horizontal Fine Adjustment:

- Vblank Start : This parameter sets the default value of the clock cycle count during which the vertical blank starts in the GENERATOR F0_VBLANK_H register at address offset 0x7C.

- Vblank End : This parameter sets the default value of the clock cycle count during which the vertical blank ends in the GENERATOR F0_VBLANK_H register at address offset 0x7C.

- VSync Start : This parameter sets the default value of the clock cycle count during which the vertical sync starts in the GENERATOR F0_VSYNC_H register at address offset 0x84.

- Vsync End : This parameter sets the default value of the clock cycle count during which the vertical sync ends in the GENERATOR F0_VSYNC_H register at address offset 0x84.

° Field 1 Vertical Settings:

- Interlaced : This parameter enables generating interlaced video and sets the Interlaced bit (6) in the GENERATOR ENCODING register to 1. This parameter is only available when the Interlaced Video Support parameter is enabled.

- Frame Size : This parameter sets the Field 1 default number of lines per frame size (with blanking) in the GENERATOR VSIZE register at address offset 0x74, bits 28:16.

- Sync Start : This parameter sets the Field 1 default value of the line count during which the vertical sync starts in the GENERATOR F1_VSYNC_V register at address offset 0x8C.

- Sync End: This parameter sets the Field 1 default value of the line count during which the vertical sync ends in the GENERATOR F1_VSYNC_V register at address offset 0x8C.

° Field 1 Horizontal Fine Adjustment:

- Vblank Start : This parameter sets the Field 1 default value of the clock cycle count during which the vertical blank starts in the GENERATOR F1_VBLANK_H register at address offset 0x88.

- Vblank End : This parameter sets the Field 1 default value of the clock cycle count during which the vertical blank ends in the GENERATOR F1_VBLANK_H register at address offset 0x88.

- VSync Start : This parameter sets the Field 1 default value of the clock cycle count during which the vertical sync starts in the GENERATOR F1_VSYNC_H register at address offset 0x90.

- Vsync End : This parameter sets the Field 1 default value of the clock cycle count during which the vertical sync ends in the GENERATOR F1_VSYNC_H register at address offset 0x90.

° Active Polarity :

- Field ID : This parameter sets the polarity of the field_id_out signal. Values of Active High or Active Low are valid. This parameter is enabled when the Interlaced Video Support and Interlaced parameters are enabled.

- Vblank : This parameter sets the polarity of the vblank_out signal. Values of Active High or Active Low are valid.

- Hblank : This parameter sets the polarity of the hblank_out signal. Values of Active High or Active Low are valid.

- Vsync : This parameter sets the polarity of the vsync_out signal. Values of Active High or Active Low are valid.

- Hsync : This parameter sets the polarity of the hsync_out signal. Values of Active High or Active Low are valid.

- Active Video : This parameter sets the polarity of the active_video_out signal. Values of Active High or Active Low are valid.

- Active Chroma : This parameter sets the polarity of the active_chroma_out signal. Values of Active High or Active Low are valid.

° Frame Sync Position :

- Frame Sync # Horizontal Position : These parameters set the default value of the clock cycle count during which Frame Sync # is active in the FRAME SYNC 0-15 CONFIG registers at address offset 0x100-0x13C.

- Frame Sync # Vertical Position : These parameters set the default value of the line count during which Frame Sync # is active in the FRAME SYNC 0-15 CONFIG registers at address offset 0x100-0x13C.

Note: The parameter values within the Constant/Default Timing Generation Options will also be the values used during timing generation when the Include AXI4-Lite Register Interface parameter is disabled. These parameter values will be used when the core is in constant mode when it does not have an AXI4-Lite interface. The default values for the resolutions are set as per CTA-861-H .