Ports Added in Version 8.1 - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

Document ID
PG056
Release Date
2022-11-16
Version
8.11 English

In version 8.1 of the core additional transceiver debug ports were added. These are only present when the Additional Transceiver Control and Status Ports option is selected. The new ports are shown in Table: Transceiver Debug Interface .

Table B-18: Transceiver Debug Interface

Port

Direction

Upgrade Action

gt0_txpmareset_in

In

Tie Low

gt0_txpcsreset_in

In

Tie Low

gt0_rxpmareset_in

In

Tie Low

gt0_rxpcsreset_in

In

Tie Low

gt0_rxpmaresetdone_out

Out

Leave open

gt0_txphaligndone_out

Out

Leave open

gt0_txphinitdone_out

Out

Leave open

gt0_txdlysresetdone_out

Out

Leave open

gt0_rxphaligndone_out

Out

Leave open

gt0_rxdlysresetdone_out

Out

Leave open

gt0_rxsyncdone_out

Out

(GTHE2 and GTPE2-based cores only) Leave open

gt0_cplllock_out

Out

Leave open

gt0_qplllock_out

Out

Leave open

gt0_txprbsforceerr_in

In

Tie Low

gt0_txprbssel_in[2:0]

In

Tie to 000

gt0_rxprbssel_in[2:0]

In

Tie to 000

gt0_rxprbserr_out

Out

Leave open

gt0_rxprbscntreset_in

In

Tie Low

gt0_rxcdrhold_in

In

Tie Low

gt0_dmonitorout_out

Out

Leave open

gt0_rxcommadet_out

Out

Leave open