The ports in Table: Quad PLL Clock Ports , Table: Alignment Interface , and Table: Transceiver Debug Interface(1) were added to version 8.0 of the core.
|
Port |
Direction |
Upgrade Action |
|---|---|---|
|
gt0_eyescantrigger_in |
In |
Tie Low |
|
gt0_eyescanreset_in |
In |
Tie Low |
|
gt0_eyescandataerror_out |
Out |
Leave open |
|
gt0_txdiffctrl_in |
In |
Tie to 1010 |
|
gt0_txpostcursor_in |
In |
Tie to 00000 |
|
gt0_txprecursor_in |
In |
Tie to 00000 |
|
gt0_txpolarity_in |
In |
Tie Low |
|
gt0_rxpolarity_in |
In |
Tie Low |
|
gt0_rxdfelpmreset_in |
In |
(GTXE2 and GTHE2-based cores only) Tie Low |
|
gt0_rxlpmen_in |
In |
(GTXE2 and GTHE2-based cores only) Tie Low |
|
gt0_rxlpmreset_in |
In |
(GTPE2-based cores only) Tie Low |
|
gt0_rxlpmhfhold_in |
In |
(GTPE2-based cores only) Tie Low |
|
gt0_rxlpmhfovrden_in |
In |
(GTPE2-based cores only) Tie Low |
|
gt0_rxlpmlfhold_in |
In |
(GTPE2-based cores only) Tie Low |
|
gt0_rxdisperr_out |
Out |
Leave open |
|
gt0_rxnotintable_out |
Out |
Leave open |
|
gt0_rxresetdone_out |
Out |
Leave open |
|
gt0_txresetdone_out |
Out |
Leave open |
|
1. Ports only present when the Additional Transceiver Control and Status Ports option is selected. |
||