If the IP requires a license key, the key must be verified. The Vivado® design tools have several license check points for gating licensed IP through the flow. If the license check succeeds, the IP can continue generation. Otherwise, generation halts with error. License checkpoints are enforced by the following tools: Vivado design tools: Vivado synthesis, Vivado implementation, write_bitstream (Tcl Command).
IMPORTANT: The IP license level is ignored at checkpoints. The test confirms a valid license exists. It does not check IP license level.
IMPORTANT: To use the optional 32G Fiber Channel (32GFC) RS-FEC sub-core, contact your local Xilinx sales representative to obtain your free license.