以下技术文档是非常实用的补充资料,可配合本指南一起使用:
- AMBA AXI4‑Stream 协议规范(ARM IHI 0051A)
- PCI-SIG 文档 (www.pcisig.com/specifications)
- Vivado Design Suite:AXI 参考指南(UG1037)
- AXI Bridge for PCI Express Gen3 Subsystem 产品指南(PG194)
- 7 Series FPGAs Integrated Block for PCI Express LogiCORE IP 产品指南(PG054)
- Virtex 7 FPGA Integrated Block for PCI Express LogiCORE IP 产品指南(PG023)
- UltraScale 器件 Gen3 Integrated Block for PCI Express LogiCORE IP 产品指南(PG156)
- UltraScale+ Integrated Block for PCI Express LogiCORE IP 产品指南(PG213)
- Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express 产品指南(PG344)
- Vivado Design Suite 用户指南:采用 IP integrator 设计 IP 子系统(UG994)
- Vivado Design Suite 用户指南:采用 IP 进行设计(UG896)
- Vivado Design Suite 用户指南:入门指南(UG910)
- Vivado Design Suite 用户指南:使用约束(UG903)
- Vivado Design Suite 用户指南:逻辑仿真(UG900)
- Vivado Design Suite 用户指南:Dynamic Function eXchange(UG909)
- ISE 到 Vivado Design Suite 移植指南(UG911)
- Vivado Design Suite 用户指南:烧录和调试(UG908)
- Vivado Design Suite 用户指南:实现(UG904)
- AXI Interconnect LogiCORE IP 产品指南(PG059)