注释: 为简便起见,本帮助页面假定 AMD Zynq™
UltraScale+™ MPSoC 在 JTAG 启动模式下启动。此处所描述的流程也可应用于其他启动模式,只需稍作更改即可。
当 Zynq UltraScale+ MPSoC 以 JTAG 启动模式启动时,所有
Cortex®-A53 核与
Cortex®-R5F 核都置于复位状态。您必须清除每个核上的复位,然后才能对这些核进行调试。XSCT 中的 rst
命令可用于清除复位。rst -processor
可用于清除各处理器核上的复位。对于包含当前目标作为子项的组(例如,APU 或 RPU),运行 rst -cores
即可清除组中的所有处理器核上的复位。例如,当 Cortex-A53 #0 为当前目标时,rst -cores
会清除 APU 中的所有 Cortex-A53 核上的复位。
以下 XSCT 会话示例演示了如何在 Zynq UltraScale+ MPSoC 的 Cortex-A53 #0 核上执行独立应用调试。
注释: 类似步骤可用于调试 Cortex-R5F 核以及 Cortex-A53 核(32 位模式)上的应用。但 Cortex-A53 核必须置于 32 位模式下,而后才能调试应用。此操作可在 POR 完成后并在清除 Cortex-A53 复位之前完成。
#connect to remote hw_server by specifying its url.
If the hardware is connected to a local machine,-url option and the <url>
are not needed. connect command returns the channel ID of the connection
xsdb% connect -url TCP:xhdbfarmc7:3121 -symbols
tcfchan#0
# List available targets and select a target through its id.
The targets are assigned IDs as they are discovered on the Jtag chain,
so the IDs can change from session to session.
For non-interactive usage, -filter option can be used to select a target,
instead of selecting the target through its ID
xsdb% targets
1 PS TAP
2 PMU
3 MicroBlaze PMU (Sleeping. No clock)
4 PL
5 PSU
6 RPU (Reset)
7 Cortex-R5 #0 (RPU Reset)
8 Cortex-R5 #1 (RPU Reset)
9 APU (L2 Cache Reset)
10 Cortex-A53 #0 (APU Reset)
11 Cortex-A53 #1 (APU Reset)
12 Cortex-A53 #2 (APU Reset)
13 Cortex-A53 #3 (APU Reset)
xsdb% targets 5
# Configure the FPGA. When the active target is not a FPGA device,
the first FPGA device is configured
xsdb% fpga ZCU102_HwPlatform/design_1_wrapper.bit
100% 36MB 1.8MB/s 00:24
# Source the psu_init.tcl script and run psu_init command to initialize PS
xsdb% source ZCU102_HwPlatform/psu_init.tcl
xsdb% psu_init
# PS-PL power isolation must be removed and PL reset must be toggled,
before the PL address space can be accessed
# Some delay is needed between these steps
xsdb% after 1000
xsdb% psu_ps_pl_isolation_removal
xsdb% after 1000
xsdb% psu_ps_pl_reset_config
# Select A53 #0 and clear its reset
# To debug 32 bit applications on A53, A53 core must be configured
to boot in 32 bit mode, before the resets are cleared
# 32 bit mode can be enabled through CONFIG_0 register in APU module.
See ZynqMP TRM for details about this register
xsdb% targets 10
xsdb% rst -processor
# Download the application program
xsdb% dow dhrystone/Debug/dhrystone.elf
Downloading Program -- dhrystone/Debug/dhrystone.elf
section, .text: 0xfffc0000 - 0xfffd52c3
section, .init: 0xfffd5300 - 0xfffd5333
section, .fini: 0xfffd5340 - 0xfffd5373
section, .note.gnu.build-id: 0xfffd5374 - 0xfffd5397
section, .rodata: 0xfffd5398 - 0xfffd6007
section, .rodata1: 0xfffd6008 - 0xfffd603f
section, .data: 0xfffd6040 - 0xfffd71ff
section, .eh_frame: 0xfffd7200 - 0xfffd7203
section, .mmu_tbl0: 0xfffd8000 - 0xfffd800f
section, .mmu_tbl1: 0xfffd9000 - 0xfffdafff
section, .mmu_tbl2: 0xfffdb000 - 0xfffdefff
section, .init_array: 0xfffdf000 - 0xfffdf007
section, .fini_array: 0xfffdf008 - 0xfffdf047
section, .sdata: 0xfffdf048 - 0xfffdf07f
section, .bss: 0xfffdf080 - 0xfffe197f
section, .heap: 0xfffe1980 - 0xfffe397f
section, .stack: 0xfffe3980 - 0xfffe697f
100% 0MB 0.4MB/s 00:00
Setting PC to Program Start Address 0xfffc0000
Successfully downloaded dhrystone/Debug/dhrystone.elf
# Set a breakpoint at main()
xsdb% bpadd -addr &main
0
# Resume the processor core
xsdb% con
# Info message is displayed when the core hits the breakpoint
Info: Cortex-A53 #0 (target 10) Running
xsdb% Info: Cortex-A53 #0 (target 10) Stopped at 0xfffc0d5c (Breakpoint)
# Registers can be viewed when the core is stopped
xsdb% rrd
r0: 0000000000000000 r1: 0000000000000000 r2: 0000000000000000
r3: 0000000000000004 r4: 000000000000000f r5: 00000000ffffffff
r6: 000000000000001c r7: 0000000000000002 r8: 00000000ffffffff
r9: 0000000000000000 r10: 0000000000000000 r11: 0000000000000000
r12: 0000000000000000 r13: 0000000000000000 r14: 0000000000000000
r15: 0000000000000000 r16: 0000000000000000 r17: 0000000000000000
r18: 0000000000000000 r19: 0000000000000000 r20: 0000000000000000
r21: 0000000000000000 r22: 0000000000000000 r23: 0000000000000000
r24: 0000000000000000 r25: 0000000000000000 r26: 0000000000000000
r27: 0000000000000000 r28: 0000000000000000 r29: 0000000000000000
r30: 00000000fffc1f4c sp: 00000000fffe5980 pc: 00000000fffc0d5c
cpsr: 600002cd vfp sys
# Local variables can be viewed
xsdb% locals
Int_1_Loc : 1113232
Int_2_Loc : 30
Int_3_Loc : 0
Ch_Index : 0
Enum_Loc : 0
Str_1_Loc : char[31]
Str_2_Loc : char[31]
Run_Index : 1061232
Number_Of_Runs : 2
# Local variable value can be modified
xsdb% locals Number_Of_Runs 100
xsdb% locals Number_Of_Runs
Number_Of_Runs : 100
# Global variables and be displayed, and its value can be modified
xsdb% print Int_Glob
Int_Glob : 0
xsdb% print -set Int_Glob 23
xsdb% print Int_Glob
Int_Glob : 23
# Expressions can be evaluated and its value can be displayed
xsdb% print Int_Glob + 1 * 2
Int_Glob + 1 * 2 : 25
# Step over a line of source code
xsdb% nxt
Info: Cortex-A53 #0 (target 10) Stopped at 0xfffc0d64 (Step)
# View stack trace
xsdb% bt
0 0xfffc0d64 main()+8: ../src/dhry_1.c, line 79
1 0xfffc1f4c _startup()+84: xil-crt0.S, line 110
注释: 如果无法从当前正在运行服务器的远程机器访问 .elf 文件,则应给
xsdb% connect -url TCP:xhdbfarmc7:3121
命令追加 -symbols
选项,如以下示例所示。