STAT_CORE_SPEED_REG: 0498 - 4.1 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2023-11-10
Version
4.1 English
Table 1. STAT_CORE_SPEED_REG: 0498
Bits Default Type Signal
0 GUI configured RO stat_core_speed
1 GUI configured RO runtime_switchable
  1. This register will be available only for the 64-bit AXI4-Stream datapath interface.
    • 00 - Standalone 25G
    • 01 - Standalone 10G
    • 10 - Runtime Switchable 25G
    • 11 - Runtime Switchable 10G