To simulate an instance of the GTM Wizard IP core, first open its example design as described in Example Design. In the example project, start a behavioral simulation by clicking in the Vivado® Integrated Design Environment (IDE). The Simulation Settings selection can be used to choose the supported simulator of your choice.
The example design instantiates an example stimulus module to drive the transmitter user interface and an example checking module that is driven by the receiver user interface of each transceiver channel. The example design combines the individual PRBS match indicators from each channel into an overall match signal. The combined match signal is the basis of a link status indicator with corresponding sticky link down indicator and dedicated reset input. See Example Design for more details on the data stimulus, checking, and link status functions of the example design. The provided test bench instantiates the example design top-level module and loops back each enabled transceiver channel in the core instance from the serial data transmitter to the receiver. This enables the example stimulus, checking, and link status logic within the example design to operate as part of a self-checking system under the stimulus of the simulation test bench. For more information, see Vivado Design Suite User Guide: Logic Simulation (UG900). Also refer to Hierarchical access simulation tutorial from Vivado Design Suite Tutorial: Logic Simulation (UG937).